IEEE Distinguished Lectures
- “Bits and Brains: Ultra-low Power, Neuro-inspired Edge-AI for Autonomous Systems” Indonesia IEEE SSCS Chapter, Bali, Indonesia, July 2021.
- “Bits and Brains: Ultra-low Power, Neuro-inspired Edge-AI for Autonomous Systems” New Delhi (India) IEEE SSCS Chapter, India, June 2021.
- “All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotem- poral Power Management of Digital Load Circuits” Seattle IEEE SSCS Chapter, May 2021.
- “All-Digital and Digital-Assisted Integrated Low-Dropout Regulators (LDOs) for Fine-Grained Spatiotem- poral Power Management of Digital Load Circuits” Switzerland (Zurich) IEEE SSCS Chapter, May 2021.
Technical Panel Participation and Presentation
- “The future of design for AI,” International Symposium on Electronics and Smart Devices (ISESD), June, 2021.
- “Foundry access for creating new technology demonstrators,” NSF Workshop on Design of micro- and nano-electronic systems, Dec 2020.
- “Electronics Innovation’s Great Leap Forward: An overview of the JUMP program” Design Automation Conference, June 2019
- “Transistor technology over the next ten years,” Device Research Conference (DRC), South Bend, June 2017.
- “Innovative practices for variation-tolerant design of circuits/systems,” VLSI Test Symposium, March, 2017.
- “Fine-Grain Power Management” Design Automation Conference, June 2016.
- “Analog IP: Is there any scope in the fragmented and commoditized market?” Workshop on Test and Verification of High Speed Analog Circuits, Los Angeles, Oct. 2015.
- “Design Techniques for the IoT World,” Custom Integrated Circuits Conference, San Jose, Sept 2015.
- “Embedded Spin Based Memory Sub-systems,” Spintronics Workshop, Honolulu, Hawaii, June 2012.
- “Opportunities for Spintronics Memory,” Non-Volatile Memories Workshop, Sendai, Japan, June 2012.
- “Non-volatile Memory for Embedded Systems: Is it worth the cost?” Non-Volatile Memories Workshop, San Diego, March 2011.
- “Memory Technologies on the horizon,” Non-Volatile Memories Workshop, San Diego, March 2010.
Keynotes and Invited Seminar Presentations
- “Merged logic and memory fabrics,” Northrop Grumman University Symposium, 2021.
- “Accelerating ML workloads using Embedded In-RRAM-Computing,” TSMC, June 2021.
- “Composable Systems – How heterogeneous integration of logic and memory fabrics are accelerating memory-centric workloads,” Information Systems and Computing Technology Network Symposium, Raytheon, May 2021.
- “Enabling Secure Hardware through Embedded Sensors and Voltage Regulators,” SRC e-workshop, November 2021.
- “Near/In-Memory Computing for Data-Intensive Applications,” DARPA Electronic Resurgence Initiative, Aug 2020.
- “Brain inspired Machines and Algorithms,” Intel Corp., June, 2020.
- “High-Efficiency System-on-Package High-Voltage Conversion for Power Delivery,” SRC e-workshop, Nov 2019.
- “Edge Intelligence for Sensing and Control,” DARPA Electronic Resurgence Initiative, Detroit, Aug 2019.
- “Beyond Vision Processing: Spiking Neural Networks for Optimizations and Control,” SRC e-workshop, July 2019.
- “In-Memory Computing for Machine Learning Workloads,” TSMC, Taiwan, Dec 2018.
- “Dynamics of Coupled Oscillators for solving Hard Problems,” DARPA Electronic Resurgence Initiative, Aug 2018.
- “Edge Intelligence through Low-Power Circuits and Systems,” ARM Ltd., Austin, Feb 2018.
- “Embedded Linear Regulators,” TSMC, Taiwan, Feb 2018.
- “Advances in Linear Regulators: Design and Control,” IBM T. J. Watson Research Lab, NY, Jan 2018.
- “Advances in Linear Regulators: Design and Control,” Qualcomm Inc, Raleigh, NC, June 2017.
- “Computing with Hardware based Dynamical Systems,” Invited Speaker Series, Purdue University, West Lafayette, USA, March 2017.
- “Compressed Domain Classifiers on Mixed-Signal Hardware,” Intel Corp, Hillsboro, OR, Dec 2016.
- “Advances in Digital and Mixed-Signal Circuits in Power Management, Sensing and Embedded Data Analytics,” Qualcomm Research, Raleigh, NC, Dec 2016.
- “Computing with Dynamical Systems,” IEEE Summer Topicals Meeting, Newport Beach, CA, July 2016.
- “On-die Regulators for Fine-grained Power Management: Digital and Hybrid Topologies with Advanced Control Techniques,” Intel Labs, Hillsboro, OR, May 2016.
- “Dynamical Systems and their Computing Properties,” Invited Speaker Series, Stanford University, Stanford, USA, Dec. 2015.
- “Enabling Fine-grained Power Management through Distributed On-Die Voltage Regulators,” Keysight Technologies Research Lab, San Jose, CA, Nov. 2015.
- “Control Strategies for Linear Regulators in On-die Voltage Regulation of Digital Load Circuits,” Qual- comm Research Lab, Raleigh, NC, Nov. 2015.、
- “Voltage Regulators for Wide Dynamic Range,” IBM T. J. Watson Research Lab, NY, Oct. 2014.
- “Linear Regulation: The Role of Adaptive Control,” Intel Corporation, Hillsboro, OR, Nov. 2013.
- “High-Efficiency On-Die Digital Linear Voltage Regulators with On-Line Adaptation for Loads with Wide Dynamic Range of Operation,” Qualcomm Inc., Raleigh, NC, USA, Oct. 2013.
- “Towards Resilient Circuits for Low Power Digital Microprocessors,” Invited Speaker Series, Stanford University, Stanford, USA, Sept. 2011.
- “Designing Adaptive and Resilient Digital Systems,” Invited Speaker Series, University of Washington, Washington, USA, Oct. 2010.
- “Carbon Nanotube Electronics: Modeling, Circuit Implications, and Challenges,” University of Michigan, Ann Arbor, May 2007.
- “Subthreshold Design: Prospects and Challenges,” University of Waterloo, Waterloo, Canada, Apr. 2007.“Designing with Subthreshold logic: From Devices to Systems,” University of Florida, Gainesville, Florida, Mar. 2007.
Tutorial Presentations
- “Merged Logic and Memory Fabrics for AI Workloads,” Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2021.
- “Electromagnetic and Machine Learning Side-Channel Attacks and Low-overhead Generic Countermea- sures,” International Symposium on Hardware Oriented Security and Trust (HOST), Dec. 2020.
- “TinyML: Ultra-Low Power Edge AI for Autonomous Systems,” IEEE International Solid State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2020.
- “Towards Memory-Centric Autonomous Systems: A Technology and Device Perspective,” International Electron Device Meeting (IEDM), San Francisco, CA, Dec. 2019.
- “Electromagnetic and Machine Learning Side-Channel Attacks and Low-overhead Generic Countermea- sures,” Conference on Cryptographic Hardware and Embedded Systems, Aug. 2019.
- “Dynamics of Coupled Systems and their Computing Properties,” IEEE International New Circuits and Systems Conference (NEWCAS), Montreal, Canada, Jun. 2018.
- “Energy-efficient Circuits and Systems for Emerging Neuro-inspired Computing,” Workshop on Compound Semiconductor Materials and Devices (WOCSEMMAD), Feb 2018.
- “Tutorial: Emerging Computational Devices, Architectures and Computational Models,” International Conference on VLSI Design, Pune, India, Jan. 2018.
- “EDA challenges in designing computing systems with post-CMOS devices,” IEEE Conference on Rebooting Computing (ICRC). Washington, D.C., Nov. 2017.
- “Vertex coloring via Coupled Dynamics” International Conference on Computer Aided Design (ICCAD), Nov 2017
- “Computing with Dynamical Systems: Solving Optimizations and Inference Problems in Continuous Time” Semiconductor Research Corporation (e-Seminar), June 2017
- “Embedded and Adaptive Voltage Regulators with Proactive Noise Reduction for Digital Loads Under Wide Dynamic Range” Texas Analog Center of Excellence (TxACE), University of Texas, Dallas, Apr. 2017
- “Advances in Linear Regulators for Fine Grain Spatiotemporal Power Management in Digital Circuits” IEEE International Solid State Circuits Conference (ISSCC), San Francisco, CA, Feb. 2017
- “Fine-grained Power Delivery and Management in SoCs: Advances in Control and Circuit Design,” IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Honolulu, HI, Dec. 2016
- “Always ON Sensors for the Internet of Smart Things,” Design Automation Conference (DAC), Austin, TX, June 2016
- “Digitizing On-die Regulators: A Scaling Perspective,” International Symposium on Quality Electronic Design (ISQED), San Jose, CA, March 2016.
- “Integrated Power Management in IoT Devices under Wide Dynamic Ranges of Operation,” Design Automation Conference (DAC), Austin, TX, June 2015
- “On Die Digital Voltage Regulators with Continuous Time and Discrete Time Control for Loads with Wide Dynamic Range of Operation,” IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), Austin, TX, May 2014.
- “Adaptive Designs in Computation and Power Management,” International Conference on Computer Aided Design (ICCAD), San Jose, CA, Nov. 2014.
- “Adaptive and Resilient Circuits for Improving Energy Efficiency in Wide Dynamic Range Digital Sys- tems,” IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Monterey Bay, USA, Oct. 2013.
- “Computing with Spin: Beyond Charge Based Electronics,” International Conference on Computer Aided Design (ICCAD), Nov. 2013.
- “Spintronics for Embedded Memory: A Model Study,” International Symposium on Low Power Electronic Design, Oct. 2013.
- “Adaptive SRAM Circuits,” Design and Test in Europe (DATE), Grenoble, France, Mar. 2013.
- “Spintronics for Embedded Non-volatile Electronics,” International Electron Device Meeting (IEDM), San Francisco, USA, Dec. 2012.
- “1T-1STT MTJ Based Embedded Memory Arrays,” Spintronics Workshop on LSI, Hawaii, USA, Jun. 2012.
- “1T-1STT MTJ Memory Arrays for Embedded Applications,” Non-volatile Memory Workshop, San Diego, USA, March 2011.
- “Design Considerations for 1T-1STT MTJ Based Embedded Memory Arrays,” CSIS International Symposium on Spintronics Based VLSI, Sendai, Japan, Feb. 2011.
- “Model study of 1T-1STT MTJ Memory Arrays for Embedded Applications,” Midwest Symposium on Circuits and Systems (MWCAS), Aug. 2010.